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BSI BS IEC 62050:2005

VHDL register transfer level (RTL) synthesis
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BSI BS IEC 62050:2005

VHDL register transfer level (RTL) synthesis

PUBLISH DATE 2005
PAGES 124
BSI BS IEC 62050:2005
Specifies a standard for use of very high-speed integrated circuit hardware description language (VHDL) to model synthesizable register-transfer level digital logic. A standard syntax and semantics for VHDL register-transfer level synthesis is defined. The subset of the VHDL language, which is synthesizable, is described, and nonsynthesizable VHDL constructs are identified that should be ignored or flagged as errors.
SDO BSI: British Standards Institution
Document Number IEC 62050
Publication Date Nov. 7, 2005
Language en - English
Page Count
Revision Level
Supercedes
Committee EPL/501
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