Logo
Login Sign Up
Current Revision

BSI BS IEC 63011-1:2018

Integrated circuits. Three dimensional integrated circuits -- Terminology
Best Price Guarantee
Instant

$228.85

2-5 Days

$228.85

SAVE 10%

$411.93


Sub Total (1 Item(s))

$ 0.00

Estimated Shipping

$ 0.00

Total (Pre-Tax)

$ 0.00


View in Library
or
British Standards Institution Logo

BSI BS IEC 63011-1:2018

Integrated circuits. Three dimensional integrated circuits -- Terminology

PUBLISH DATE 2019
PAGES 14
BSI BS IEC 63011-1:2018
IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided.
SDO BSI: British Standards Institution
Document Number IEC 63011-1
Publication Date Jan. 24, 2019
Language en - English
Page Count
Revision Level
Supercedes
Committee EPL/47
Loading...

Failed to load document history.

Publish Date Document Id Type View