This standard defines the mechanical, electrical, timing, and protocol requirements of the SCSI parallel interface to allow conforming SCSI devices to inter-operate. The SCSI parallel interface is a local I/O bus that may be operated over a wide range of transfer rates. The objectives of the SCSI parallel interface are
The interface protocol includes provision for the connection of multiple initiators (SCSI devices capable of initiating an I/O process) and multiple targets (SCSI devices capable of responding to a request to perform an I/O process). Distributed arbitration (i.e., bus-contention logic) is built into the architecture of this standard. A default priority system awards interface control to the highest priority SCSI device that is contending for use of the bus and an optional fairness algorithm is defined. This standard defines the physical attributes of an input/output bus for interconnecting computers and peripheral devices. This standard has made obsolete the following: a) The high voltage differential (HVD) option of differential driver/receivers. Implementations that use HVD should reference the SCSI Parallel Interface-2 standard (ISO/IEC 14776-112). b) The 32-bit SCSI bus width option. Implementations that use 32-bit wide buses should reference the SCSI Parallel Interface-2 standard (ISO/IEC 14776-112). c) The SCSI configured automatically (SCAM) option. Implementations that use SCAM should reference the SCSI Parallel Interface-2 standard (ISO/IEC 14776-112). d) The CONTINUE TASK message and the TARGET TRANSFER DISABLE message. Implementations that use the CONTINUE TASK message or TARGET TRANSFER DISABLE message should reference the SCSI Parallel Interface-2 standard (ISO/IEC 14776-112)
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