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IEC 60191-6-17 Ed. 1.0 b:2011

Mechanical standardization of semiconductor devices - Part 6-17: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for stacked packages - Fine-pitch ball grid array and fine-pitch land grid array (P-PFBGA and P-PFLGA)
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IEC 60191-6-17 Ed. 1.0 b:2011

Mechanical standardization of semiconductor devices - Part 6-17: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for stacked packages - Fine-pitch ball grid array and fine-pitch land grid array (P-PFBGA and P-PFLGA)

PUBLISH DATE 2011
PAGES 58
IEC 60191-6-17 Ed. 1.0 b:2011

Mechanical standardization of semiconductor devices - Part 6-17: General rules for the preparation of outline drawings of surface mounted semiconductor device packages.

Design guide for stacked packages - Fine-pitch ball grid array and fine-pitch land grid array (P-PFBGA and P-PFLGA).

IEC 60191-6-17:2011 provides outline drawings and dimensions for stacked packages and individual stackable packages in the form of FBGA or FLGA.

SDO IEC: International Electrotechnical Commission
Document Number IEC 60191
Publication Date Jan. 1, 2011
Language b - English & French
Page Count
Revision Level 1.0
Supercedes
Committee 47D
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