IEC 63504-2804 Ed. 1.0 en:2023

Current Revision
Software-Hardware Interface for Multi-Many-Core

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Software-Hardware Interface for Multi-Many-Core

PUBLISH DATE 2023
PAGES 90

Software-Hardware Interface for Multi-Many-Core

IEC 63504-2804:2023 defines an architecture description standard from the software design perspective - this provides a common interface that abstracts the hardware properties that are critical to enable multicore tools.

The standard includes:

  • Performance estimation accuracy for complex processors like Very Long Instruction Word (VLIW) core and complex contention scenarios,
  • Description of caches to include uncached memory regions and caches for subsets of memories,
  • Properties for coarse power consumption estimation, and
  • Reusability by separating eXtensible Markup Language (XML) files for processor description and other memory/communication-related information.

This is an IEC/IEEE dual logo standard.

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