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IEEE 896.2a-1994

IEEE Standard Backplane Bus Specification for Multiprocessor Architectures: Futurebus+(R)
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IEEE 896.2a-1994

IEEE Standard Backplane Bus Specification for Multiprocessor Architectures: Futurebus+(R)

PUBLISH DATE 1994
PAGES 26
IEEE 896.2a-1994
Amendment Standard - Inactive-Withdrawn. This supplement contains errata, corrections, and clarifications to IEEE Std 896.2a-1991. Futurebus+ standards provide systems developers a set of tools with which high-performance bus-based systems may be developed. This architecture provides a wide range of performance scalability over both cost and time for multiple generations of single- and multiple-bus multiprocessor systems. This document, a companion standard to ISO/IEC 10857: 1994 [ANSI/IEEE Std 896.1, 1994 Edition], builds on the logical layer by adding requirements for physical layer instantiation. Material in this document includes specifications for node management, live insertion, and profiles. It is to these profiles that products will claim conformance. Other specifications that may be required in conjunction with this standard are the following: IEEE Std 896.3-1993; IEEE Std 1212-1991; IEEE Std 1194.1- 1991; and the IEEE 1301 series of standards.
SDO IEEE: Institute of Electrical and Electronics Engineers
Document Number 896.2
Publication Date July 5, 1994
Language en - English
Page Count 26
Revision Level a
Supercedes
Committee Microprocessor Standards Committee
Publish Date Document Id Type View
April 24, 1992 896.2-1991 Revision