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IEC 61188-5-6 Ed. 1.0 b:2003

Printed boards and printed board assemblies - Design and use - Part 5-6: Attachment (land/joint) considerations - Chip carriers with J-leads on four sides
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IEC 61188-5-6 Ed. 1.0 b:2003

Printed boards and printed board assemblies - Design and use - Part 5-6: Attachment (land/joint) considerations - Chip carriers with J-leads on four sides

PUBLISH DATE 2026
PAGES 46
IEC 61188-5-6 Ed. 1.0 b:2003
Printed boards and printed board assemblies - Design and use - Part 5-6: Attachment (land/joint) considerations - Chip carriers with J-leads on four sides
Provides information on land pattern geometries used for the surface attachment of electronic components with J leads on four sides. Provides the appropriate size, shape and tolerances of surface mount land patterns so as to ensure sufficient area for the appropriate solder fillet, and also allows for inspection, testing and reworking of resulting solder joints.
SDO IEC: International Electrotechnical Commission
Document Number IEC 61188
Publication Date April 1, 2026
Language b - English & French
Page Count 46
Revision Level 1.0
Supercedes
Committee 91
Publish Date Document Id Type View
April 1, 2026 IEC 61188-5-6 Ed. 1.0 b:2003 Revision
Jan. 1, 2003 Revision